Three greenish-yellow spheres of varying sizes arranged in a triangular formation on a white background.
Silicon carbide substrate wafer placed in a clear containing, showcasing its high-quality finish for research applications.

Silicon Carbide Substrate 4inch 6inch Production/Dummy Grade 4H Semi-insulating SiC Wafer IGBT

Angebotspreis$3,985.00
Grade:P Grade
Size:4inch
Number Of Item:5Item
Menge:
♦️High-quality SiC wafer for Research and Experiment.
♦️Provide thinning process, thickness from 100um.
♦️Global shipping, secure payment, large inventory.
♦️Minimum delivery time within 1 week. Shipped by FedEx, DHL,UPS, etc.
SiC Substrate Specification:
  • Size: 4inch;
  • Poly tyep: 4H;
  • Diameter: 99.5~100mm;
  • Thickness: 500um±25;
  • Surface Orientation on-axis: <0001>;
  • FWHM(0004):<45arcsec;
  • Primary flat orientation: [1-100]±5°;
  • Primary flat length: 32.5±1.5mm;
  • Secondary flat: None;
  • Micropipe: ≤1ea/cm2;
  • Hexagonal void:None;
  • Resistivity: ≥1E10ohm·cm;
  • LTV≤None;
  • TTV≤5um
  • Warp≤20um;
  • Bow≤-15μm~15μm;
  • Surface Roughness: Si face Ra<0.2 nm(5*5mm);
  • Poly area: None;
  • Scratches: ≤2,Total Length≤Diameter;
  • Back defects: None;
  • Particels: ≤60(size≥0.3μm;
  • Surface finish: Double Side Polish, Si Face CMP;
  • Packing: Multi-wafer Cassette Or Single Wafer Container;
      ♦️High-quality SiC wafer for Research and Experiment.
      ♦️Provide small quantities, special specifications products, and customized services.
      ♦️Global shipping, secure payment, large inventory.
      ♦️Minimum delivery time within 1 week. Shipped by FedEx, DHL,UPS, etc.
      SiC Substrate Specification:
      • Size: 6inch;
      • Diameter: 150mm±0.25;
      • Thickness: 350um±25;
      • Surface Orientation: 4°toward[11-20]±5°;
      • Primary Flat orientation:[11-20]±5°;
      • Primary Flat Length:47.5mm±1.5;
      • Secondary flat: None;
      • Micropipe: ≤10/cm2;
      • Resistivity: 0.015~0.028Ω;
      • TTV≤10um;
      • Warp≤55um;
      • Bow≤45um;
      • Surface Roughness: Si face Ra<0.5 nm;
      • Cracks: None;
      • Roughness: None;
      • Edge Chips: ≤2, the length and width of each <1mm;
      • Surface finish: Double Side Polish, Si Face CMP;
      • Packing: Multi-wafer Cassette Or Single Wafer Container;